Bidirectional buffers are often used as circuits that connect or disconnect wires while buffering input signals.
FIG. 1 shows an example of a bidirectional buffer.
Referring to FIG. 1, bidirectional buffer 20A is inserted between wire 10_1 and wire 10_2. Bidirectional buffer 20A includes configuration memories 6_1 and 6_2 and tristate buffers 5_1 and 5_2.
Tristate buffers 5_1 and 5_2 each have input terminal x, output terminal y, and control terminal c. Output terminal Q of configuration memory 6_1 is connected to control terminal c of tristate buffer 5_1, and output terminal Q of configuration memory 6_2 is connected to control terminal c of tristate buffer 5_2.
Output terminal y of tristate buffer 5_1 is connected to input terminal x of tristate buffer 5_2, and the connection wire of these terminals is connected to one end of wire 10_1.
Output terminal y of tristate buffer 5_2 is connected to input terminal x of tristate buffer 5_1, and the connection wire of these terminals is connected to one end of wire 10_2.
Tristate buffer 5_1 is controlled in accordance with the output value (logic value) of configuration memory 6_1 that is supplied to control terminal c. When the logic value is “1,” tristate buffer 5_1 supplies the signal that is applied to input terminal x from output terminal y while buffering the signal. When the logic value is “0,” output terminal y of tristate buffer 5_1 enters a high-impedance state.
Tristate buffer 5_2 is controlled in accordance with the output value (logic value) of configuration memory 6_2 that is supplied to control terminal c. When the logic value is “1,” tristate buffer 5_2 supplies the signal that is applied to input terminal x from output terminal y while buffering the signal. When the logic value is “0,” output terminal y of tristate buffer 5_2 enters a high-impedance state.
In a state in which “1” is held in configuration memory 6_1, and “0” is held in configuration memory 6_2 in the above-described bidirectional buffer 20A, a signal that is received as input by way of wire 10_2 is transmitted to wire 10_1 while being buffered in tristate buffer 5_1.
In a state in which “1” is held in configuration memory 6_2 and “0” is held in configuration memory 6_1, a signal that is received by way of wire 10_1 is transmitted to wire 10_2 while being buffered in tristate buffer 5_2.
When “0” is held in both of configuration memories 6_1 and 6_2, bidirectional buffer 20A acts to disconnect both of wire 10_1 and wire 10_2.
As described hereinabove, bidirectional buffer 20A is able to change the propagation direction of the signal that is buffered and to disconnect wire 10_1 from 10_2 in accordance with the held content of configuration memories 6_1 and 6_2, i.e., the configuration data.
FIG. 2 shows the configuration of another bidirectional buffer. This bidirectional buffer 20B has the function of supplying the output signal of another circuit 2 to wire 10_1 or wire 10_2 while buffering the signal in addition to the function of bidirectional buffer 20A shown in FIG. 1.
Referring to FIG. 2, bidirectional buffer 20B has tristate buffers 5_1 and 5_2 and multiplexers 3_1 and 3_2. In FIG. 2, configuration memories 6_1 and 6_2 shown in FIG. 1 have been omitted.
Both of multiplexers 3_1 and 3_2 each have first and second input terminals, an output terminal, and control terminal s.
Control terminal s of multiplexer 3_1 and control terminal c of tristate buffer 5_1 are connected by way of wire 7_1 to output terminal Q of configuration memory 6_1 shown in FIG. 1.
Control terminal s of multiplexer 3_2 and control terminal c of tristate buffer 5_2 are connected by way of wire 7_2 to output terminal Q of configuration memory 6_2 shown in FIG. 1.
Output terminal y of tristate buffer 5_1 is connected to the first input terminal of multiplexer 3_2, and the connection wire of these terminals is connected to one end of wire 10_1. Output terminal y of tristate buffer 5_2 is connected to the first input terminal of multiplexer 3_1, and the connection wire of these terminals is connected to one end of wire 10_2.
The output terminal of multiplexer 3_1 is connected to input terminal x of tristate buffer 5_1, and the output terminal of multiplexer 3_2 is connected to input terminal x of tristate buffer 5_2. The output signal of circuit 2 is supplied to the second input terminals of each of multiplexers 3_1 and 3_2.
In bidirectional buffer 20B described above, according to configuration data supplied by way of wire 7_1 and 7_2, wire 10_1 is disconnected from wire 10_2, or a signal that is supplied to wire 10_1 or wire 10_2 is selected by multiplexers 3_1 and 3_2, and the signal that was selected is transmitted to wire 10_1 or 10_2 while being buffered by tristate buffer 5_1 or tristate buffer 5_2.
A large number of bidirectional buffers such as shown in FIG. 1 or FIG. 2 are used in, for example, buses that link macro-blocks together or in the programmable wire of reconfigurable circuits.
However, a problem arises in which, because each of the above-described bidirectional buffers uses two tristate buffers and configuration memories that take up a large area, the bidirectional buffer also takes up a large area. The large area of bidirectional buffers raises serious problems in circuits that employ a large number of bidirectional buffers.
In addition, the use of two tristate buffers having large parasitic capacitance raises the problem in which power consumed by the bidirectional buffer will increase. The increased power consumption of bidirectional buffers is a serious problem in circuits that employ a large number of bidirectional buffers.
Still further, the use of SRAM (Static Random Access Memory) as configuration memory necessitates the writing of configuration data to the memories each time the power is turned on. This writing of configuration data to memories requires a certain amount of time, and further, consumes considerable power.
As a means that can provide a solution to the above-described problems, there is a bidirectional buffer disclosed in Patent Literature 1 that is equipped with rewriteable variable-resistance nonvolatile switch elements.
FIG. 3 shows the configuration of the bidirectional buffer that is equipped with rewriteable variable-resistance nonvolatile switch elements.
Referring to FIG. 3, bidirectional buffer 20c has buffer 50, multiplexer 30, and demultiplexer 31. Buffer 50 has input terminal x and output terminal y.
Multiplexer 30 has first to third input terminals, three rewritable variable-resistance nonvolatile switches 1_1, 1_2, and 1_3, and an output terminal. In multiplexer 30, the first input terminal is connected to the output terminal by way of rewritable variable-resistance nonvolatile switch 1_1, the second input terminal is connected to the output terminal by way of rewritable variable-resistance nonvolatile switch 1_2, and the third input terminal is connected to the output terminal by way of rewritable variable-resistance nonvolatile switch 1_3.
Demultiplexer 31 has first and second output terminals, two rewritable variable-resistance nonvolatile switches 1_4 and 1_5, and an input terminal. In demultiplexer 31, the input terminal is connected both to the first output terminal by way of rewritable variable-resistance nonvolatile switch 1_4 and to the second output terminal by way of rewritable variable-resistance nonvolatile switch 1_5.
The first input terminal of multiplexer 30 is connected to the first output terminal of demultiplexer 31, and the connection wire of these terminals is connected to one end of wire 10_1. The third input terminal of multiplexer 30 is connected to the second output terminal of demultiplexer 31, and the connection wire of these terminals is connected to one end of wire 10_2. The output signal of circuit 2 is supplied to the second input terminal of multiplexer 30.
The output terminal of multiplexer 30 is connected to input terminal x of buffer 50. Output terminal y of buffer 50 is connected to the input terminal of demultiplexer 31.
In bidirectional buffer 20c described hereinabove, multiplexer 30 selects one signal from among a signal that is received by way of wire 10_1, a signal received by way of wire 10_2 and the output signal of circuit 2 and supplies the selected signal to buffer 50. Demultiplexer 31 further selects either wire 10_1 or wire 10_2 as the output destination of the signal from buffer 50.
The selection of input in multiplexer 30 is determined according to the conductive state of each of rewritable variable-resistance nonvolatile switches 1_1, 1_3, and 1_3. The selection of the output destination in demultiplexer is determined according to the conductive state of each of rewritable variable-resistance nonvolatile switches 1_4 and 1_5.
FIG. 4 shows the configuration of a rewritable variable-resistance nonvolatile switch element.
Referring to FIG. 4, rewritable variable-resistance nonvolatile switch element 1 has a configuration in which ion-conductor 61 is sandwiched between first electrode 60 and second electrode 62. First electrode 60 is composed of a material that can be readily ionized such as Cu. Second electrode 62 is composed of a material that is difficult to ionize such as Ru.
When a voltage that is higher than that of second electrode 62 by a set voltage Vset is applied to first electrode 60 for a fixed time interval, a conductive state (switched ON state) is realized between first electrode 60 and second electrode 62. When voltage of the reverse direction is applied between first electrode 60 and second electrode 62 for a fixed time interval in this conductive state, first electrode 60 and second electrode 62 are disconnected from each other. This disconnection state is the switched OFF state.
Rewritable variable-resistance nonvolatile switch element 1 described above features nonvolatility whereby the immediately preceding state is held despite interruption of the power supply. As a result, the bidirectional buffer shown in FIG. 3 has the merit that configuration data need not be written each time power is turned on.
In addition, rewritable variable-resistance nonvolatile switch element 1 has the added advantage that parasitic capacitance is extremely low. As a result, increased power consumption by rewritable variable-resistance nonvolatile switch elements 1_1-1_5 does not pose a problem in the bidirectional buffer shown in FIG. 3.
Still further, because the bidirectional buffer shown in FIG. 3 has only one buffer, and further, does not require configuration memories, the bidirectional buffer has the merits of having a smaller circuit area and lower power consumption than the bidirectional buffer shown in FIG. 1 or FIG. 2.